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This paper deals with the design and implementation of the power stage of a forced-commutated current-source converter (CSC) for use in industry applications of distribution type static synchronous compensator (D-STATCOM). The power semiconductors are switched at 500 Hz according to the switching patterns generated by selective harmonic elimination method for the elimination of the most significant four low-order harmonics.The possibility of using various power semiconductors in CSC is examined both theoretically and experimentally. The requirement of bipolar voltage-blocking capability is achieved by the use of an asymmetric integrated gate commutated thyristor (IGCT) and a fast-recovery diode instead of a single symmetrical device, which maximizes the converter power rating and makes natural-air cooling realizable. Determination of optimum dc-link reactor in view of the power quality standards and design of optimum turn-ON and turn-OFF snubbers in view of the chosen power semiconductor characteristics are shown to be critical design issues in the paper.Design principles are verified by both laboratory tests and field tests conducted on two different industrial D-STATCOM prototypes. It has been shown that an IGCT-based CSC can be successfully used in industry applications of D-STATCOM systems by designing the power stage according to the proposed principles.

Categories: IEEE 2011 PROJECTS

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